#! /bin/bash

# Lint files as Verilog-2001, finding submodules as needed in the current directory
# We check with both Verilator and Icarus Verilog since they catch different things.

ALL_FILES=$@

for FILE in ${ALL_FILES}
do
    echo -n "Checking file: ${FILE}"
    echo
    echo "*** VERILATOR LINT ***"
    verilator -Wall +1364-2001ext+v -y . --lint-only  ${FILE}
    echo
    echo
    echo "*** ICARUS VERILOG LINT ***"
    iverilog  -Wall -Wno-sensitivity-entire-vector -Wno-sensitivity-entire-array -g2001 -y . -o /dev/null ${FILE}
    echo
    echo
    echo "*** EXTRA CHECKS ***"
    echo
    grep -H -n "reg[^=]*[^]];" ${FILE} && echo "Missing initialization for a declared register (non-port). This will introduce an X in simulation, or create incorrect startup state on FPGA."
    grep -H -n "wire.*=" ${FILE} && echo "Found an initialization assignment to a wire. This can create multiple drivers."
    grep -Lq "\`default_nettype.*none" ${FILE} || echo "Missing \"\`default_nettype none\" directive. This can hide undefined wires and variables."
done

